The opportunity
Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services.
What you'll do
Own DVT for complex PCBAs and subassemblies from first power‑on through design sign‑off.
Power validation: power‑up/down sequencing, regulator/hotswap behavior, rail margining, DC IR drop, and AC noise/ripple characterization.
Clock distribution validation and high‑speed I/O interface validation (e.g.,: Ethernet/PCIe-class links, board‑to‑board connectors and cabling).
Low‑speed system management interface validation (e.g., I2C/SPI/USB) and: debug of intermittent or systemic failures.
Stress/environmental testing (extended runtime, temperature cycling) and: characterization under margined conditions.
Own system integration validation planning and execution across: representative configurations and operating envelopes.
What they're looking for
- Drive readiness and execution across lab and chamber environments, including: dependency management (test scripts, instrumentation, SW readiness, sample availability).
- Validate and debug system-level issues spanning electrical, mechanical, thermal, and optics interactions.
- Partner with reliability and manufacturing teams to ensure DVT coverage: supports ramp readiness and reduces escapes.
- Define a risk‑based DVT strategy spanning board/subassembly engineering: validation through system integration validation.
