The opportunity
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
What you'll do
Perform partition synthesis and physical implementation steps (e.g.: synthesis, floorplanning, power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks)
Develop/improve physical design methodologies and automation scripts for various implementation steps
Closely collaborate with the ASIC design team to drive architectural: feasibility studies, develop timing, power and area design targets, and explore RTL/design tradeoffs
Resolve design/timing/congestion and flow issues, identify potential solutions and drive execution
Run, debug, and fix signoff closure issues in static timing analysis (STA),: noise, logic equivalency, physical verification, electromigration and voltage drop
Bachelor’s degree in electrical engineering, computer engineering or computer science
What they're looking for
- + years of professional experience working on RTL2GDSII physical design: and/or physical design flow development
- Experience with industry standard EDA tools including understanding of their: capabilities and underlying algorithms
- Knowledge of deep sub-micron FinFET and CMOS solid state physics
- Understanding of CMOS digital design principles, basic standard cells their: functionality, standard cell libraries