The opportunity
Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services.
What you'll do
Analyze AI workloads, kernels and system bottlenecks to identify high-value architectural opportunities.
Quantify feature value using targeted performance models, workload studies: and representative application scenarios.
Translate architectural ideas into concrete microarchitecture, including: datapaths, control, memory behavior, data movement and interfaces.
Evaluate interactions with the compiler, runtime, programming model and performance-critical kernels.
Develop, or partner with implementation teams to develop, targeted: prototypes, RTL experiments, synthesis studies or analytical models to validate feasibility and estimate power, performance and area.
Explore architectural alternatives and clearly articulate their benefits,: costs, risks and implementation trade-offs.
What they're looking for
- + years of experience in computer architecture, microarchitecture or: processor development, including work with CPUs, GPUs, AI accelerators or other high-performance processors.
- Deep understanding of computer architecture and microarchitecture.
- A track record of taking architectural features from workload need or initial: concept through microarchitecture definition and implementation.
- Strong quantitative judgment, including the ability to evaluate performance: benefits against power, area, complexity and programmability costs.
- Experience using targeted hardware performance models and: architecture-exploration tools to evaluate specific features, using Python, C++ or similar environments.
- Ability to reason across workloads, kernels, memory systems, interconnects and compute pipelines.
- Working knowledge of RTL, synthesis, timing, power and physical-design: considerations sufficient to establish implementation feasibility.
- Experience collaborating closely with RTL, verification, physical-design,: compiler, kernel and system-software teams.
