The opportunity
Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services.
What you'll do
On Wafer Scale Engines, develop and debug flows that embed well tested and: deployable optimizations in production processes to reduce time and costs
Work on refining AI Systems across H/W-S/W design constraints such as di/dt,: V-F characterization space, current and temperature limits in relation to optimizations for performance.
Develop/Enhance infrastructure to enable silicon for real world workload testing
Develop self-checking metrics, as well as instrumentation for debug and coverage
Work with the silicon architects/designers, performance engineers and: software engineers to enhance performance of Wafer Scale Engines.
Work across domains such as, Software, Design, Verification, Emulation &: Validation to refine and optimize performance and process.
What they're looking for
- Work with CI/CD tools, git repositories, github, git actions/Jenkins, merge: and release flows to streamline test and release.
- BS/BE/B.Tech or MS/M.Tech in EE, ECE, CS or equivalent work experience
- + years of industry experience
- years of experience in Pre-silicon & Post Silicon ASIC hardware
