The opportunity
About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems…
What you'll do
Develop, build and own tools, flows and methodologies for physical implementation
Own physical implementation of floorplan blocks from floorplanning to final signoff
Collaborate with RTL designers to drive optimal block implementation solutions
Analyze and optimize design for timing, power, and area trade-offs, working: in collaboration with EDA vendors and ASIC partners
BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry: experience in physical design and methodology development
Demonstrated success in taping out complex silicon designs
What they're looking for
- Hands-on experience with block physical implementation and PPA convergence
- Strong coding experience with python, bazel, TCL
- Strong experience building physical design tools, flows and methodologies
- Strong understanding of microarchitecture, RTL design, physical design,: circuit design, physical verification and timing closure.
