The opportunity
OpenAI’s Hardware organization develops custom silicon and systems for advanced AI workloads. Our first-party accelerator team works across chip architecture, design, software, and systems to build the computing platforms that power frontier models.
What you'll do
Define and implement SoC architectures spanning embedded processors, AMBA: interconnects, peripheral subsystems, PCI Express, Ethernet and die-to-die interfaces.
Develop the microarchitecture and RTL design of subsystems supporting I/O and SoC functionality.
Integrate Arm Cortex-M and Cortex-A processors, AXI/APB fabrics, and: third-party controller IP, including the RTL and glue logic needed to connect these components.
Develop reset and boot architectures, working with firmware and software: teams to define sequencing, initialization, and survivability behavior.
Incorporate debug, test, and security requirements into the SoC architecture: and implementation, partnering with other silicon designers to make the silicon observable, testable, and secure.
Drive PCIe and other I/O integration, including controller and PHY: interfaces, high-speed SerDes, and die-to-die connectivity.
What they're looking for
- Contribute to power management and security architecture and design.
- Work directly with third-party IP vendors to define technical requirements,: evaluate IP capabilities, coordinate deliverables, and resolve issues from integration through silicon bring-up.
- Work across architecture, design, verification, physical design, and software: teams to define interfaces, resolve integration issues, and carry designs through pre-silicon validation and post-silicon bring-up.
- Work closely with Firmware and Software teams to define boot, configuration: and runtime behavior and functionality.
