The opportunity
OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models.
What you'll do
Lead system signal integrity (SI) design for AI supercomputer product in the data center application.
Collaborate with chip, package, boards, rack and system engineers, design: partners to drive system SI design and develop innovative interconnect and high-speed technologies
Identify and evaluate new technologies and methodologies to improve signal: and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity
Perform simulation and modeling to identify and troubleshoot signal integrity issues
Lead system interconnect design, bring up and qualification
As the scope of the role and team grows, understand and influence roadmaps: for hardware partners for our datacenter networks, racks, and buildings.
What they're looking for
- Have at least 10 years of industry experience, including experience design: hardware system and SerDes testing for data center applications
- Have a strong bias toward action, and won’t take no for an answer.
- Have experience and good knowledge of system design experience in the SI: areas, from chip, SerDes, board, rack level
- Have experience with PCB, connector and cable design
