The opportunity
Anthropic trains and serves frontier AI models on some of the largest accelerator fleets in the world, and we're now building the custom hardware systems that fleet will run on — from the package boundary out through boards, racks, interconnect, power, cooling, and the datacenter interface.
What you'll do
Own the integrated hardware systems program plan across board, chassis, rack,: and interconnect — from requirements through EVT/DVT/PVT, qualification, and production ramp — and be the source of truth on schedule, risk, and readiness.
Drive execution with ODMs, contract manufacturers, and component/optics: vendors: SOWs, build schedules, deliverable tracking, factory readiness, and escalation when they slip.
Stand up and run the NPI cadence: build matrix, engineering reviews, DFx, issue triage, exit criteria — and keep it lightweight enough that a small, senior team actually uses it.
Drive the bring-up and validation program for new platforms: lab and pilot-rack logistics, firmware/BMC/diagnostics coordination, test coverage, and the reliability and telemetry targets a platform has to hit before it enters the fleet.
Own the interfaces that make or break a hardware program: silicon (samples, package, power/thermal envelopes), datacenter (power, cooling, rack integration, deployment windows), infrastructure software (management plane, provisioning, telemetry), and supply chain (long-lead components, second-sourcing, allocation).
Run partner and technology evaluations as a program: candidate ODMs, reference platforms, connector/optics/memory options — and land build / buy / co-design recommendations with the architecture team.
What they're looking for
- Experience with AI/ML accelerator systems (GPU, TPU, custom ASIC), HPC, or: hyperscale datacenter platforms and their scale-up / scale-out fabrics.
- Experience taking a first-generation, custom-silicon-based system from bring-up through fleet deployment.
- Experience with liquid-cooled and/or high-density rack architectures, rack: level high power distribution, or optical interconnect programs.
- Familiarity with the chip-package-system interface and coordinating tightly with a silicon team.
- Experience with datacenter integration, deployment, and fleet-scale reliability/RAS programs.
- Practical experience using AI tools in your own workflow, and clear ideas: about where they help and where they don't.
- BS/MS in EE, CE, ME, or a related field, or equivalent experience.
